diff options
Diffstat (limited to 'vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go')
-rw-r--r-- | vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go b/vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go new file mode 100644 index 0000000..a968b80 --- /dev/null +++ b/vendor/golang.org/x/sys/cpu/cpu_linux_arm64.go | |||
@@ -0,0 +1,111 @@ | |||
1 | // Copyright 2018 The Go Authors. All rights reserved. | ||
2 | // Use of this source code is governed by a BSD-style | ||
3 | // license that can be found in the LICENSE file. | ||
4 | |||
5 | package cpu | ||
6 | |||
7 | import ( | ||
8 | "strings" | ||
9 | "syscall" | ||
10 | ) | ||
11 | |||
12 | // HWCAP/HWCAP2 bits. These are exposed by Linux. | ||
13 | const ( | ||
14 | hwcap_FP = 1 << 0 | ||
15 | hwcap_ASIMD = 1 << 1 | ||
16 | hwcap_EVTSTRM = 1 << 2 | ||
17 | hwcap_AES = 1 << 3 | ||
18 | hwcap_PMULL = 1 << 4 | ||
19 | hwcap_SHA1 = 1 << 5 | ||
20 | hwcap_SHA2 = 1 << 6 | ||
21 | hwcap_CRC32 = 1 << 7 | ||
22 | hwcap_ATOMICS = 1 << 8 | ||
23 | hwcap_FPHP = 1 << 9 | ||
24 | hwcap_ASIMDHP = 1 << 10 | ||
25 | hwcap_CPUID = 1 << 11 | ||
26 | hwcap_ASIMDRDM = 1 << 12 | ||
27 | hwcap_JSCVT = 1 << 13 | ||
28 | hwcap_FCMA = 1 << 14 | ||
29 | hwcap_LRCPC = 1 << 15 | ||
30 | hwcap_DCPOP = 1 << 16 | ||
31 | hwcap_SHA3 = 1 << 17 | ||
32 | hwcap_SM3 = 1 << 18 | ||
33 | hwcap_SM4 = 1 << 19 | ||
34 | hwcap_ASIMDDP = 1 << 20 | ||
35 | hwcap_SHA512 = 1 << 21 | ||
36 | hwcap_SVE = 1 << 22 | ||
37 | hwcap_ASIMDFHM = 1 << 23 | ||
38 | ) | ||
39 | |||
40 | // linuxKernelCanEmulateCPUID reports whether we're running | ||
41 | // on Linux 4.11+. Ideally we'd like to ask the question about | ||
42 | // whether the current kernel contains | ||
43 | // https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=77c97b4ee21290f5f083173d957843b615abbff2 | ||
44 | // but the version number will have to do. | ||
45 | func linuxKernelCanEmulateCPUID() bool { | ||
46 | var un syscall.Utsname | ||
47 | syscall.Uname(&un) | ||
48 | var sb strings.Builder | ||
49 | for _, b := range un.Release[:] { | ||
50 | if b == 0 { | ||
51 | break | ||
52 | } | ||
53 | sb.WriteByte(byte(b)) | ||
54 | } | ||
55 | major, minor, _, ok := parseRelease(sb.String()) | ||
56 | return ok && (major > 4 || major == 4 && minor >= 11) | ||
57 | } | ||
58 | |||
59 | func doinit() { | ||
60 | if err := readHWCAP(); err != nil { | ||
61 | // We failed to read /proc/self/auxv. This can happen if the binary has | ||
62 | // been given extra capabilities(7) with /bin/setcap. | ||
63 | // | ||
64 | // When this happens, we have two options. If the Linux kernel is new | ||
65 | // enough (4.11+), we can read the arm64 registers directly which'll | ||
66 | // trap into the kernel and then return back to userspace. | ||
67 | // | ||
68 | // But on older kernels, such as Linux 4.4.180 as used on many Synology | ||
69 | // devices, calling readARM64Registers (specifically getisar0) will | ||
70 | // cause a SIGILL and we'll die. So for older kernels, parse /proc/cpuinfo | ||
71 | // instead. | ||
72 | // | ||
73 | // See golang/go#57336. | ||
74 | if linuxKernelCanEmulateCPUID() { | ||
75 | readARM64Registers() | ||
76 | } else { | ||
77 | readLinuxProcCPUInfo() | ||
78 | } | ||
79 | return | ||
80 | } | ||
81 | |||
82 | // HWCAP feature bits | ||
83 | ARM64.HasFP = isSet(hwCap, hwcap_FP) | ||
84 | ARM64.HasASIMD = isSet(hwCap, hwcap_ASIMD) | ||
85 | ARM64.HasEVTSTRM = isSet(hwCap, hwcap_EVTSTRM) | ||
86 | ARM64.HasAES = isSet(hwCap, hwcap_AES) | ||
87 | ARM64.HasPMULL = isSet(hwCap, hwcap_PMULL) | ||
88 | ARM64.HasSHA1 = isSet(hwCap, hwcap_SHA1) | ||
89 | ARM64.HasSHA2 = isSet(hwCap, hwcap_SHA2) | ||
90 | ARM64.HasCRC32 = isSet(hwCap, hwcap_CRC32) | ||
91 | ARM64.HasATOMICS = isSet(hwCap, hwcap_ATOMICS) | ||
92 | ARM64.HasFPHP = isSet(hwCap, hwcap_FPHP) | ||
93 | ARM64.HasASIMDHP = isSet(hwCap, hwcap_ASIMDHP) | ||
94 | ARM64.HasCPUID = isSet(hwCap, hwcap_CPUID) | ||
95 | ARM64.HasASIMDRDM = isSet(hwCap, hwcap_ASIMDRDM) | ||
96 | ARM64.HasJSCVT = isSet(hwCap, hwcap_JSCVT) | ||
97 | ARM64.HasFCMA = isSet(hwCap, hwcap_FCMA) | ||
98 | ARM64.HasLRCPC = isSet(hwCap, hwcap_LRCPC) | ||
99 | ARM64.HasDCPOP = isSet(hwCap, hwcap_DCPOP) | ||
100 | ARM64.HasSHA3 = isSet(hwCap, hwcap_SHA3) | ||
101 | ARM64.HasSM3 = isSet(hwCap, hwcap_SM3) | ||
102 | ARM64.HasSM4 = isSet(hwCap, hwcap_SM4) | ||
103 | ARM64.HasASIMDDP = isSet(hwCap, hwcap_ASIMDDP) | ||
104 | ARM64.HasSHA512 = isSet(hwCap, hwcap_SHA512) | ||
105 | ARM64.HasSVE = isSet(hwCap, hwcap_SVE) | ||
106 | ARM64.HasASIMDFHM = isSet(hwCap, hwcap_ASIMDFHM) | ||
107 | } | ||
108 | |||
109 | func isSet(hwc uint, value uint) bool { | ||
110 | return hwc&value != 0 | ||
111 | } | ||